A common method to improve the efficiency of a switching regulator is to decrease the frequency under light load. But low frequency may result in large ripple in an output voltage of the switching regulator and may influence the performance of the switching regulator. For example, in a high side buck converter, low frequency may slow the dynamic response because the output voltage could not be detected timely. Thus, there should be a lower limit of the switching frequency. The conventional way to maintain the switching frequency above the lower limit is to decrease a peak current signal as the load decreases. The peak current signal may be adjusted according to a frequency signal, e.g. a switching period, an off time or an on time of the switching regulator. But in that case, sub-harmonic oscillation may be caused.